[justsomehnguy]

TL;DR: bi-directional memory access with some means to notify the other part about "something has changed".

It's not that different for any other PIC/E device, be it a network card or a disk/HBA/RAID controller.

If you want to understand how it came to this - look at the history of ISA, PCI/PCI-X, a short stint for AGP and finally PCI-E.

Other comments provides a good ELI15 for the topic.

A minor note about "bus" - for PCEe it is mostly a historic term, because it's a serial, P2P connection, though the process of enumerating and qurying the devices is still very akin to what you would do on some bus-based system, e.g.: SAS is a serial "bus", compared to SCSI, but still you operate with it as some "logical" bus, because it is easier for humans to grok it this way.

[pedrolins]

I find it very interesting that you mention looking at the history of ISA's first in order to understand the current iteration of the technology.

I was reading the RISC-V privileged ISA recently and the amount of seemingly arbitrary registers and behaviours that must be implemented to support a UNIX-like OS is crazy, and that got me thinking about the history behind all of these things that the hardware must support in order to support the OS.

But thank you for the pointers, I'll definitely use this.

[swetland]

The "ISA" mentioned above is the "Industry Standard Architecture", the 8/16bit bus used by PCs and PC clones back in the day, not "Instruction Set Architecture (x86, ARM, RISC-V, etc): https://en.wikipedia.org/wiki/Industry_Standard_Architecture

[phendrenad2]

Not that ISA: :) https://en.wikipedia.org/wiki/Industry_Standard_Architecture

[justsomehnguy]

Ha! I definitely meant ISA bus, as others had mentioned.

Kudos to swetland and phendrenad2!