[vatys]

For chips, that's commonly referred to as "binning" as in the sorting machine drops chips into different bins based on a test result.

A big design with many cores, such as CPU or GPU cores, may have manufacturing defects that makes one or more cores bad. Or it may be on one side or another of a tolerance range and not be able to work at higher power or higher frequency. These parts may get "binned" into a lower performance category, with some cores disabled (because a flaw prevents the core from working) or with reduced maximum performance states.

These are still "good" parts, and can be sold at a lower cost with lower performance, while the "better" and "best" parts will pass more tests and be able to have more or all portions of the chip enabled.

So it's not so much to work around a "bug" which might be a common flaw to all part designs, rather to work around manufacturing tolerance and allow more built parts to be useful rather than garbage.

[ghettoimp]

Binning is definitely a possibility. Separately from binning, there are often just features that don't work right and get disabled with "chicken switches" or "feature enable bits."

Any two-ANE design would have a lot of control logic that has to be right, e.g., to manage which work gets sent to which ANE, which cache lines get loaded, etc. It's easy to imagine bugs in this logic which would only show up when both ANEs are enabled. So it's likely that there is a chicken bit that you could use to disable one of the ANEs and run in single-ANE mode.

[brigade]

Manufacturing defects are not hardware bugs.

Binning is irrelevant to hardware bugs.

[vatys]

That's what I'm saying, in response to the previous comment saying this is to work around a bug. Bugs are common to all parts, where defects are unique per part. Binning works around manufacturing defects and turns a yield problem into different grades or SKUs of parts.