[sguav]

You have high-level-synthesis tools on many FPGA vendors tools, using C/C++ or even Python for hardware description. I personally don't think they are superior than typical HDLs, the thing that makes the difference is to think about the circuit you ought to describe, the language you use then is not as important IMHO.

[tsss]

I don't mean high-level synthesis. In fact, using C++ or Python is even worse because there is even more mismatch in the abstraction.