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by GeekyBear 1568 days ago
Much more interesting from a technical standpoint:

>how would you even top a single 432mm2 chip that’s already pushing the limits of manufacturability on TSMC’s N5 process?

By enabling the M1 Ultra’s two dies to transparently present themselves as a single GPU

It’s a problem that multiple companies have been working on for over a decade, and it would seem that Apple is charting new ground by being the first company to pull it off.

https://www.anandtech.com/show/17306/apple-announces-m1-ultr...

1 comments

Yep, even the infinity fabric isn't "as good as" the Ultra inter-die connection.

AMD, Intel and others have been trying for a while, but so far I only know about Cerebras simply making a single-wafer "chip" to actually pull it off. Of course, that is completely impossible to do at scale, trashing an entire wafer is extremely expensive and not something you're going to do at a 100million+ device sales target.

I am super curious what the Asahi project and others are going to pull from underneath the marketing and macOS-visible parts, the M1 adventures alone were very interesting to follow.

Hector Martin is expecting only minimal changes to be needed for the M1 Ultra.

>Chances are our kernel will Just work on M1 Ultra with just device tree changes, might not even need any m1n1 changes.

https://twitter.com/marcan42/status/1501271229763706882

I just remembered that they suspected this interconnect last year when they were probing AIC2 and found essentially a full unused half of the controller specifically designed for multi-die scenarios. Makes sense they can now enable that functionality with minimal changes.