[kop316]

According to this website: MPW-1 had a hold time violation in it's clock tree, so the RISC-V is unusable.

https://www.zerotoasiccourse.com/post/mpw1-bringup/

[makomk]

Yikes. If I'm understanding that correctly every chip that came back from MPW-1 was more or less unusable - they were all required to gate access to I/Os behind the same management processor provided by the company organising the run, and because that management processor was broken they couldn't configure the I/Os to route through to their own designs.

[kop316]

Yeah that is my understanding too. You REALLY don't want a hold time violation, as you have to go in and edit the chip circuitry to fix that.