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by throwawaylinux
1578 days ago
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It does. Outside of MMIO which nowadays is just the control plane for device configuration and the main processing state machines (e.g., starting and stopping processing of command and completion packets in ring buffers in memory). So those commands which are the primary control plane for the data operations are even all in memory! Then the data operations themselves are all memory too of course. It is possible for the PCI host bridge DMAs to load and store into caches, but in practice it can be difficult if not impossible to line everything up so the data is in cache when it is required, because of the data throughput and pipelining (many parallel pipelines) latency variations even on local NAND devices, etc. Maybe you get your command/complete rings from cache (which would be nice since they have to come in order and the CPU has to operate on), but it's very hard to get all your data served by the caches. The old favorite netflix serving talks show this https://people.freebsd.org/~gallatin/talks/euro2021.pdf |
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