[pjdesno]

Long ago I interned for the group supporting the C-30 ARPANET IMP. At one point the IMP was a 16-bit machine, emulating the old Honeywell (?) minicomputer that the original IMP code was written for. At some point they needed more memory, so they lashed on another 4-bit bit slice, and it became a 20-bit machine.

There was an alternate microcode load for it, which implemented an instruction set similar to that of a PDP-11, and could run an ancient version of Unix. (maybe not so ancient back in 1985, but definitely pre-BSD) We used one or two of those for our development machines, and it was my job to write software tools on them, using C with 20-bit words and 10-bit bytes.

Man, it was a pain in the ass.

[larsbrinkhoff]

The CPU was called MBB (Microprogrammable Building Block).

Here's the C/30 Programmer's Reference for the "Native Mode Firmware System". That was the software that ran in the native 20-bit mode rather than emulating the 16-bit Honeywell mini.

https://walden-family.com/impcode/c30-nmfs-programmers-refer...

[googamooga]

I have working PDP-11/23 in my possession and last couple of months I’m trying to convince myself that I have enough soldering skills to solder four additional memory lanes on its backplane to increase memory limit from 256KB to 4096KB. Otherwise even though I install a processor able to work with 22bit addresses only 18bit addressing will be available.

[linguistiliniw]

IIRC MSP430 microcontrollers do something like that, too. They have low-power 16-bit CPUs, but you can't do a lot with 64k memory space so newer models have instructions with 20-bit addressing.

They're fun to work with; some versions have FRAM instead of Flash memory.

[wildzzz]

FRAM is pretty neat. I considered using an MSP430FR5969-SP for a component on a satellite but backed off when I learned more about the destructive read process. We were concerned about a transient bitflip during the write back and had no where safe to store program code other than the FRAM itself. Instead, we went with a RISC-V core in an FPGA and used an 8 channel ADC to cover the telemetry reporting the MSP430 was supposed to handle. I spent a lot of time writing fast, safe code for it so was a little disappointed it never made it into the final design.

[larsbrinkhoff]

The Unix machine was called C70, right?