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by tyingq
1593 days ago
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>I’m not sure that FPGA can handle more than two voltage levels There is a high-Z (high impedance) state you can set I/O pins to for a third state, but no way to detect that high impedance state from the FPGA. It's just used to share an output line with more than one pin. You could make a peripheral that could detect the three states though, with a voltage divider and an analog input. |
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