Very dumb question: If mmWave is operating at 60GHz, how would it be possible for processors (which are operating at less than 1/10th of that clock rate) to process that sampling rate?
In summary, 60 GHz is the CARRIER frequency (the central frequency) around which a modulated signal is centred or otherwise aligned. The modulated signal BANDWIDTH (channel width) is where the signal information is encoded and is going to be measured in Mega-Hertz (MHz).
E.g. for 802.11a/n/c the CARRIER is in the 5.x GHz band but the modulated signal BANDWIDTH will be one of 20, 40, 80, 160 MHz around a central frequency [0]. The 'base' 20MHz bandwidth at best performance (signal to noise ratio) will be able to modulate (encode) at a raw 54Mbits/second.
Intel publish [1] an easy-to-read set of tables that show the relationships between standards, frequencies, bandwidths, MIMO, and modulation schemes.
[0] simplified - actually there is a (frequency-hopping or direct sequence) spread-spectrum method
The same way you can receive/transmit a 5GHz wifi signal using devices running at a fraction of that clock rate: most of the critical high-frequency signal processing happens using analog electronics. The actual sample rate of the digitized signal is much lower.
Yes. The relevant information may be contained in a narrow swath of bandwidth riding within that 60GHz. Say you use 60GHz as a carrier but only care about changes happening below 10kHz. You can separate out that from the returned signal and only process 20k samples/second.
The other comments are good answers to your question, but here's a fun little fact: if you actually want to directly read a 60Ghz signal, you actually need to sample it at 120Ghz to get it all! Good old nyquist.
The radar isn't using the entire 0 Hz to 60 GHz band, it will be using something like a few GHz or sometimes much less. i.e. 60-64 GHz
Also much of the processing isn't done on general purpose processors but in FPGAs or ASICs which can do lots of the parallel computation very fast.
For comparison 802.11ac has a max of 120 MHz channels, and that's cheap and everywhere these days (but runs on 5 GHz).
There are lots of basically tricks to reduce the amount of data in successive stages so that the processing is quite possible.