[n7pdx]

It is quite a bit more than parity to slightly ahead. From 130nm to 22nm the Intel process advantage was enormous. That the horrible P4 architecture was able to compete and be cost-effective is testament to that. Intel architects and designers never had to work very hard to beat the competition.

That is one of the reasons Intel was able to get away with their garbage in-house EDA tooling and processes. Intel was also able to get away with delays to fix their bugs (due to awful validation methodology).

Even if Intel process catches up TSMC, they would have fix their design tooling, hire talented engineers and get rid of the entrenched hacks who built their careers on mediocrity.