[miselin]

This would be wonderful - I hacked on a CPU architecture and brought it to an FPGA by manually converting a Logisim [1] schematic to VHDL. It's still terribly buggy.

Maybe it'd be possible to write an integration for the (unmaintained) Logisim to export the schematic to a HDL of some sort to get close.

[1] http://www.cburch.com/logisim/

[ChickeNES]

> Maybe it'd be possible to write an integration for the (unmaintained) Logisim to export the schematic to a HDL of some sort to get close.

No need, Digital (https://github.com/hneemann/Digital) already does this:

> A circuit can be exported to VHDL or Verilog. There is also direct support for the BASYS3 Board and the TinyFPGA BX board. See the documentation for details. The examples folder contains a variant of the example CPU, which runs on a BASYS3 board.