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The US may have technological supremacy when it comes to design and the resultant products, but it lags behind in terms of actually manufacturing semiconductors. The dominant players are in Asia (TSMC, Samsung, GF) and Europe (GF). Intel has their own fabs, but they are currently behind the competition, and up until very recently only fabricated their own products. There are a lot of other companies in the industry with fabs, but they're generally making their own products - discrete devices - rather than integrated circuits/System-on-a-Chip's. Another issue is the equipment used for manufacturing. It's very hard to come by, and the classic example is ASML (Netherlands), which dominates the market for lithography equipment. I work on the design side, not in a fab, so I can't tell you much about sourcing or refining the silicon for wafers. Wafers are used to make every single microchip you can imagine. There has been a slow but continuous push towards using larger wafers, since its more cost-effective. I imagine it's more difficult, but couldn't tell you any specifics. As far as manufacturing each individual integrated circuit: yes, larger is harder to manufacture because there is more physical space for a defect to occur. There are some design challenges as well when you get very large, but it's not a significant overhead because you're usually doing your design in sub-pieces anyways. Some designs do use redundancy, as you mentioned. This is more often the case for very large, very uniform structures, like DRAM, flash, CPU cache, etc. But there's a tradeoff because you waste money on that redundancy for every chip that comes out with no defects. And there's overhead to actually testing the part in order to utilize the redundancy. In my experience, yields are targeted at the high 90%s these days, so the redundancy would have to be very cheap to be worth it. For almost all RF, analog, and mixed-signal circuits, there is no redundancy. I'd say most digital circuits, except the largest, also don't have any. |