[PragmaticPulp]

> this is mostly wrong. The real issue has always been memory bandwidth.

Not really wrong. Memory bandwidth is only a limitation for a very narrow subset of problems.

I've gone back and forth between server-grade AMD hardware with 4-channel and 8-channel DDR4 and consumer-grade hardware with 2-channel DDR4. For most of my work (compiling, mostly) the extra memory bandwidth didn't make any difference. The consumer parts are actually faster for compilation because they have a higher turbo speed, despite having only a fraction of the memory bandwidth.

Memory bandwidth does limit certain classes of problems, but we mostly run those on GPUs anyway. Remember, the M1 Max memory bandwidth isn't just for the CPU. It's combined bandwidth for the GPU and CPU.

It will be interesting to see how much of that memory can be allocated to a M1 Max. It might be the most accessible way to get a lot of high-bandwidth RAM attached to a GPU for a while.

[dannyw]

GP is talking specifically about GPUs. iGPUs are 100% bottlenecked by memory bandwidth; specifically it is the biggeset bottleneck for every single purchasable iGPU on the market (excluding M1 Pro/Max).

Your compute anecdotes have no bearing on (i)GPU bottlenecks.

[mcdevilkiller]

They talking specifically about GPUs.