[k0stas]

It already has been a problem in terms of gate leakage, although largely mitigated by material improvements.

Gate leakage is the phenomenon of quantum tunneling through the gate dielectric barrier and started appearing as gate dielectrics became thinner and thinner. Gate leakage was mitigated by moving to higher k dielectrics (from silicon dioxide, SiO2, to more exotic materials that include other elements such as Hafnium).

Higher k dielectrics allow for the same capacitance per unit area and channel control with a thicker physical gate compared to plain SiO2, reducing gate leakage. This technology change came along with metal gates (which used to be polysilicon) and were a combined advance that Intel incorporated a few years before before TSMC, IIRC circa 2008.

This is a circuit designer's perspective. Someone who actually understands device physics and material properties can chime in to correct me.

[baybal2]

Your nickname rings familiar. Ex-Xilinx by any chance?

[istarial]

Do you have any books that you recommend on this topic? would love to get my hands dirty to the degree that i can with this