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by brucehoult
1728 days ago
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The embedded market using custom silicon is by far the shipment volume and dollar value leader. That's why that's what RISC-V vendors have been concentrating on at first. The part of the embedded market that uses off the shelf chips may have more designs, but they are each low volume enough that they are dominated by engineering time (and thus employ more engineers, who are vocal online) not by saving a few cents on an MCU that doesn't have the instruction you want. The packaging and testing and stocking costs of a chip with nothing more than a generic MCU inside it are such a high proportion of the cost compared to the actual die that it would be silly to leave any available low silicon cost extensions out, unless done for monopolistic market segmentation reasons e.g. you can't buy a Cortex M0+ with an FPU at any price because ARM would prefer to sell you an M4F for much more money. The RISC-V market with many vendors with many cores is not prone to such artificial market segmentation. If you want the equivalent of an M0 (short pipe, no cache, no branch prediction etc) but with an FPU or with 64 bits or with a vector unit then RISC-V vendors say "sure, no problem". |
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All of that is fine for somebody designing for a million-unit SSD, who doesn't need to read any of this, and for chip vendors selling to that person.
But for each such somebody, literally thousands are stuck with whatever chip purchasing says they can get cheap enough off the shelf. Those chips will be exactly the ones that somebody else ordered 100M of without considering for even a second what the thousands of others whose experience they dictate need.
And, it remains a fact that none of the RISC-V MCU chips I can buy off the shelf have any of the B extension instructions implemented.