Cesium beam atomic clocks are actually just a very selective band pass filter / detector. There is a DC output in microamperes which is proportional to how well centered the input frequency is in relationship to the resonance of the Cesium atoms in the ambient conditions as they drift across the tube. To use this filter as a clock, it is slaved to a quartz oscillator which is them multiplied and phase locked, with a small bit of FM at 137 hz prior to being fed into the tube. If the frequency is too low, the output will be in phase with the FM, if the frequency is too high, the phase will be opposite, and if it is centered, there will be a 274 hz "2x" output, which is used to indicate lock.
Thus, the cesium isn't actually sampled at ~9.192 Ghz, but rather a much slower rate. The actual loop maintaining phase is as slow as possible to keep phase noise down, which is part of why they take a while to lock on startup.
Further complicating things is the need for a small persistent magnetic field in the tube, as getting zero in all 3 dimensions is a much harder problem. This bias keeps things stable, but also changes the frequency slightly, but is offset out in the divider chain.
Right. Actually, from what I understand, the situation is even more dire and Cesium clocks are (would be) complete rubbish at timing consecutive ticks, so when people say cesium clock they actually mean a quartz oscillator (ultrapure, double ovenized, binned, aged, etc -- but still quartz) to create the output and then a control loop to push/pull the quartz oscillator and frequency lock it to the cesium absorption line.
A similar trick is more commonly used to lock, say, a 5.8GHz on-chip oscillator to a 10MHz quartz oscillator, except in this case the quartz oscillator plays the role of long-term reference and the on-chip VCO plays the role of short-term reference, whereas in the case of an atomic clock it's the other way around.
The overall game is that different filters/oscillators are better at different timescales, so you use control loops to synthesize the best parts of each of them into a clock that is good at all timescales.
Thus, the cesium isn't actually sampled at ~9.192 Ghz, but rather a much slower rate. The actual loop maintaining phase is as slow as possible to keep phase noise down, which is part of why they take a while to lock on startup.
Further complicating things is the need for a small persistent magnetic field in the tube, as getting zero in all 3 dimensions is a much harder problem. This bias keeps things stable, but also changes the frequency slightly, but is offset out in the divider chain.