Processor microcode is closed source (Intel/AMD), including most of the BIOS code. You are having hard time to build your devices. Maybe we can see change in the future.
> coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
Maybe it does not seem a reasonable price to you, but for people who don't know, the HiFive Unmatched [1] sells for 679$ [2].
This is the most powerful RISC-V platform you can buy today. It comes as a Mini-ITX board including 16Gb of DDR4 ram, 1Gbps ethernet, usb 3.2, PCI Express and NVMe.
Of course it is less powerful than an x64 machine at the same price point, but it should work reasonably well when paired with an SSD and a graphics card.
On another hand, I don't remember the last time I was interested in a CPU's frequency. In isolation it gives no insights about the performance of a CPU, not even single-threaded performance. Even with the exact specs I wouldn't know how to interpret them, and I doubt many people would.
Nowadays I just check the benchmarks of a CPU to have a rough idea of it's performance.
I’m not sure I understand how microcode is a problem here. Microcode isn’t an OS. I can compile for arm 8.3 and execute those instructions on apple silicon just fine. The kernel is the only thing that gets in the way, not the microcode…
I guess they mean the coprocessor stuff, ime and whatever the AMD one is called.
I mean this does forget the point that absolutely nothing is stopping anyone making a riscv processor which also has such features; we just have to take the manufacturer’s word that they don’t? Riscv isn’t the solution to any of these problems, but hopefully it’ll enable a few more ethical manufacturers to pop up who do make this stuff their core mission.
> coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
https://github.com/coreboot/coreboot