[dw-im-here]

We (I work for ascenium) do operate with a notion of op, in the sense that we specify ALU ops happening at a given location. I'm not sure that the idea we're trying to convey when we say killing the ISA can be easily understood, but it ties together with the fact that we instruct the core in a far more detailed fashion than your typical CPU during compile time.

In short, our machine code (control words) is far more imperative than typical RISC instructions. RISC specifies what should happen, ours specifies the what _and_ the how

Also, I don't think an FPGA is a very good description of what we do, but on the other hand I did use the same analogy to describe what I do when I started working here, so it's not terribly wrong either

[nynx]

Are you hiring (interns)?

[dw-im-here]

We're hiring, but not interns

[nynx]

Gotcha. Thanks for replying.