[wmf]

SiFive likes to include just enough resources to do well on their benchmark du jour (was dhrystone, now SPECint) and leave out the rest. So they end up comparing an Arm core with NEON against their RISC-V cores with no SIMD/vector support for example.

[zozbot234]

Previous cores had no vector support because the V extension that provides for it was nowhere close to being standardized. In fact it's yet to be ratified at present, so one may want to wait for that before choosing a V-capable core for real, actual use.

[seg_lol]

Which is fine because what would normally be handled by the SIMD will be custom silicon for most customers and have a 4-100x speedup over what SIMD could provide.