[zsmi]

> how do you generate recursive designs in vhdl?

I understand mapping a recursive algorithm to hardware, and VHDL can definitely do that [1]. (even if it is generally a bad idea) But what is a recursive hardware design? It sounds really interesting.

[1] https://vhdlguru.blogspot.com/2010/04/recursive-functions-in...

[anon_tor_12345]

actually this is exactly what i was talking about i.e. (as far as i understand it) this is essentially a reduction tree. i called it a recursive hardware design because it synthesizes to indeed i was unaware that you recursively call functions in vhdl. thanks!