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by martyvis 1846 days ago
Totally agree. Their release seems to make it seem that dual core with multiple hundred K of RAM is unique. The elephant in the room is while it has nice GPIO interfaces for sensors, you want onboard wireless for backhaul. Espressif have had this space for a couple of years now.
4 comments

I can think of many application with no need for wireless backhaul, or where wireless becomes a liability. It boils down to cost, power, noise, security, frequency used, and complexity. LoRa or similar is probably better than Wifi for many applications. I like that it isn't opinionated about the wireless stack.

I'm guessing that lots of Picos will see use as enhanced GPIOs for Pi "motherships," which provide backhaul to multiple wired-in Picos.

In fact I have a project which could use a decidedly non-wireless USB GPIO, for use on an airplane imaging system.

What you say is true, however, $1 is a killer feature.

It can replace many IC and will make a very good addition to ESP32 which lacks pins for many projects. And, sometimes you want external chip so output is not affected by ESP32 reboots or freezes.

For secure applications, on-board wireless makes your life hell. I'm actually pretty happy they didn't.
Depending on application and how you define "secure", you might find that having an easily sniffable SPI/SDIO/UART connection between main MCU and wifi chip can be a weakness.
I believe the point is "no wifi whatsoever".

If you need wifi, by all means, go integrated. But not everybody does.

The problem with onboard wireless is that this adds a boatload of complexity regarding certification in various regulatory domains, trademark compliance, ...
...not to mention massive code size increase, for wifi/bt driver. And that driver is likely to come as an inscrutable binary blob.