[jeff_ciesielski]

I hate to give an 'it depends', but it depends.

Typically, no. In SPI all lines are actively driven high or low rather than an open drain configuration. The bus master drives SCK (SPI clock), MOSI (master out, slave in) and CS (chip select), and the slave device(s) drive the MISO (master in, slave out) line(s). From an operating perspective, pullup/pulldown resistors are not required.

Now having said that, in some cases it's considered appropriate to add weak pullup/pulldown resistors to the data lines to ensure that they're in the expected state on power up and to prevent glitches from putting slave devices into weird states.

[monocasa]

Three wire SPI is pretty common where everyone's MOSI and MISO are connected together open drain style, and the master clocks out 1s to let the slave pull the data line down for read operations. You have clock out something from the master during 4 wire SPI read anyway so it doesn't change a lot most of the time.