[Unklejoe]

That would be odd if true.

I've personally created a BSP and did board bring-up on a platform based on the NXP LS1046A (one of their ARM based QorIQ SoCs). That chip uses DDR4 and didn't require any blobs (aside from the Ethernet hardware). All of the memory controller registers were fully documented too. The DDR4 controller there was very similar to the DDR3 controller on their older T2080 PPC chip that I've worked with.

In fact, one of the most annoying parts of the board bring up was determining what data strobe delay values to use via a process of trial and error.

I'm not sure why NXP would use a different DDR4 controller for the iMX that requires a blob while their other chips don't.

[hlandau]

Author here. It wouldn't particularly surprise me. If I had to guess why other NXP products didn't go with Synopsys, it might be related to the fact that the i.MX8M is intended to be suitable for mobile applications therefore support for LPDDR4 is more important. In fact Synopsys's DDR4 PHY can support both, I believe (IIRC) dynamically, with i.MX8M chips which can be used with either. There are other DDR PHY IP providers (e.g. Cadence) which don't require blobs. Plus these are probably separate business units.

I've confirmed the presence of these blobs in i.MX8M BSPs myself, as has Purism, see their blog post.