[Grambo]

My understanding of the use of FPGAs and ASICs that are used to speed up neural networks (such as those in phones) is that they are simply designed to do the types of calculations used for NNs more quickly (matrix operations) and generally at a reduced level of precision. This is very different from a memristor approach where the structure of the network itself would be represented in the silicon. I also think it's unfair to compare the two because it took decades of work to get CMOS transistors to where they are today. I imagine that once commercial applications for memristors appear many optimizations/improvements will present themselves.

[theamk]

"the structure of the network itself would be represented in the silicon" -- ASICs then? perhaps even hybrid analog/digital one, where fixed coefficients are stored in digital memory, while input data is analog.

I believe there is a great value in being able to "snapshot" the state and later load exactly the same state into millions of devices. And I cannot see how this will easily work with memristors.