Memory bandwidth is but one aspect of GPU performance, and also memory bandwidth is substantially upgraded in this APU. It has support for LPDDR4X-4267 68.2 GB/s, up from DDR4 3200's 51.2 GB/s.
But the Vega 8 in this is definitely not the peak that you can squeeze out of DDR4. If that was the case then we wouldn't have had things like the Vega 11 in the 3400G. Also RDNA2's "Infinity Cache" helps reduce memory bandwidth requirements, which would also be a relevant upgrade.
This was just a time-to-market strategy to reduce risk. Not an optimal engineering decision. This let them avoid trying to make a power-optimized version of RDNA2 at the same time they were trying to release any version of RDNA2.
Navi improves delta compression for memory, which improves effective memory bandwidth for a given "raw" bandwidth. So switching to Navi would have alleviated the memory bandwidth bottleneck to some degree and improved performance.
It is a puzzling decision and perhaps the "wasn't ready when they taped out" explanation is the correct one. Cezanne seems to have been ready for a while now and just waiting for fab capacity - meaning it would have had to have been taped out in parallel with the RDNA2 architecture chips. So a design flaw in RDNA2 might have blown the Cezanne launch.
They could have used RDNA1 though and it still would have improved compression over GCN/Vega. Or ported over just the delta compression. I guess maybe they just wanted to port Zen3 over straight, use the memory controller they'd already proven with Renoir, and not take any risks?
It's definitely puzzling and I haven't heard an explanation I would consider 100% satisfactory.
Citation needed. Doesn't seem to be borne out by benchmarks comparing chips with varying iGPU resources and same memory setup.
Sure, they're going to be meomry bound some of the time, and it depends on what kind of bw/compute balance the GPU code is tuned for... but we didn't stop putting more cores and wider SIMD on chips either just because then current SW didn't fully utilize them.
Also in the article it is clearly mentioned that time to market using vega was much shorter than reinventing the wheel which was important i'm guessing since AMD is still small compared to intel in mobile space and they have struggled in the past in this segment.
Yes, though I'm pretty sure the same rationale was used for the 4000 series APUs as well.
I have a feeling that the particular market these chips are aimed at that improving the iGPU by even something like 50% is not that meaningful, it's still not going to be competitive with discrete and will nearly always be pair with one if gaming is an option on the particular laptop.
And so I suppose the rationale might be that it's just easier to stick with Vega and the current power draw for the iGPU as acceptable for the required graphics horsepower. Maybe one day we'll see an APU powerful enough to remove the need for discrete GPU in laptops, not for awhile yet though :).
Unlike DDR, GDDR is optimised for high-bandwidth (over latency), which is why dedicated GPUs can be so much faster. HBM even more so. DDR5 does 6.4Gbps, whereas HBM2E does 2.5Tbps (per stack).
But the Vega 8 in this is definitely not the peak that you can squeeze out of DDR4. If that was the case then we wouldn't have had things like the Vega 11 in the 3400G. Also RDNA2's "Infinity Cache" helps reduce memory bandwidth requirements, which would also be a relevant upgrade.
This was just a time-to-market strategy to reduce risk. Not an optimal engineering decision. This let them avoid trying to make a power-optimized version of RDNA2 at the same time they were trying to release any version of RDNA2.