|
|
|
|
|
by saagarjha
1969 days ago
|
|
> which, NB, ARM has not had until M1 This isn't true at all: other ARM cores have gone all the way to implement full sequential consistency. Plus, the ARM ISA itself is "good enough" to do efficient x86 memory model emulation as part of an extension to Armv8.3-A. |
|