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by raggi 1987 days ago
I do wonder about single address space, I've seen a few experimental systems follow this strategy lately and it feels reliant on hardware less defective than we presently have in commodity user gui performance systems.
1 comments

IBM i (OS/400) has had single address space, tagged pointers, and an number of other "novel" things in the loop for eons. Many people interact with it daily, indirectly, in most of your big box retail stores (think stores like Costco, Lowes, etc).
Parent did say "it [single address space] feels reliant on hardware less defective than we presently have in commodity user gui performance systems".

OS/400 and successors don't run on this kind of hardware.

Is that kind of hardware going to be available in 50 years?
Given how we don't even have ECC memory, we shouldn't hold our breaths...
In what concerns ARM and SPARC platforms, memory tagging is happening and being adopted by Apple/Google platforms, in what concerns Intel, it was yet again another from their screwups.
Interesting. Do Apple M1/Ax have memory tagging already?
I'm curious about tagged pointers, do those relate to the single address space design? Might you or someone else have any good links on this?
You can start by the links on my comment, https://news.ycombinator.com/item?id=25743690
They're not without their share of critical hardware bugs too, e.g. CVE-2020-4788