[efferifick]

While sibling comments mention that it is probably wiser to learn digital logic before HDL (and I agree with them), I think it is important to also consider that there is now High Level Syntehesis where programming languages similar to C (e.g., OpenCL) can compile to VHDL. HLS may lower the barrier for programmers to take advantage of FPGAs. However, whether the design can compile to fit the constraints of the FPGA available is another question that I do not know the answer.