[easde]

This is an oversimplified statement. Extra decode width only helps if the rest of the CPU can actually process so many instructions in parallel without blocking on other resources like memory. x86 CPUs also have their own features to alleviate the limited decode width such as micro-op caches.

Case in point is the Samsung Exynos M3, which despite its 6-wide decoder is barely competitive with the 3-wide ARM Cortex-A76. The Exynos would fare very poorly against any recent 4-wide Intel or AMD CPU.

The crazy thing about the M1 is that every structure in the CPU is huge - the decoders, the ROB, the number of execution units, even the caches. And apparently all of it is implemented very efficiently.