|
|
|
|
|
by maxioatic
2023 days ago
|
|
I don't fully grasp assembly, instruction sets, and how CPUs work so pardon the silly questions. I think I understand 1) as since they know the width they can more accurately divide the instructions to more parallel executers (whatever they are - the execution ports?) 2) I believe this allows more "pre-work" to get done before it's actually needed, but then the "pre-work" just chills until 3) these things do the work, and there an abnormally high amount of them? p.s. Any noob friendly reading is also appreciated! |
|
For 2, imagine a boa-constrictor swallowing a huge piece of prey. One mouth (CPU: the frontend) and one rear (CPU: the retirement phase). The instructions go in the front end in the program order. They are decoded into operations that pile up in the middle (the giant bulge in the boa constrictor). When an instruction is ready to go, one of the execution ports (3--think of 16 little stomachs) picks up an instruction and executes it. Then at the backend, the retirement phase, instructions are committed in the order they appeared in the original program, so that the program computes the same result.
By making basically all of the pieces of this boa constrictor bigger and more numerous, it eats a lot more instructions per clock (on average). Making that bulge (the reorder buffer) huge allows the CPU to have high chance of some useful work to feed to one of its 16 stomachs.