|
|
|
|
|
|
by aey
2021 days ago
|
|
|
It’s an L2, amd zen has 2x16mb L3s, with a wacky point of unification. L3 is muuuuch slower than L2. Apple’s L2 is huge and is the PoU for all the cores. I wouldn’t be surprised if it has direct routing to all the L1s since they are so small. 5nm doesn’t hurt. |
|
|
Zen 3 is not, it's a single 32MB L3 per chiplet.
> L3 is muuuuch slower than L2.
"L2" and "L3" are just how many layers away from the CPU it is, it's not an intrinsic "type" of cache. The speed is a function of the size.