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by throwaway_pdp09
2030 days ago
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From your link > In the DRAM region we’re actually seeing a large change in behaviour of the new microarchitecture, with vastly improved load bandwidth from a single core, increasing from 14.8GB/S to 21GB/s Yeah, that's odd. But the article's really about cache, so maybe it's a mistake. Next para says > More importantly, memory copies between cache lines and memory read-writes within a cache line have respectively improved from 14.8GB/s and 28GB/s to 20GB/s and 34.5GB/s. so it looks like it's talking about cache not ram but... shrug |
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