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by phamilton 5521 days ago
I think ARM is developing fine for high performance work. Nvidia's Denver is probably going to be half GPU anyway, so parallel workloads will thrive on their ARM chip.

I also think a RISC instruction set is starting to look pretty nice, since (as I understand it) x86 chips break CISC instructions down to RISC-like micro-ops anyway. Why not move that process off the die (where space, power and thermal requirements are strict) into the compiler.

The transition away from PowerPC wasn't that tough in reality. If anything, it told Apple that such a change is very possible. With Windows 8 coming to ARM, it's not that big of a deal for Apple to follow suit.

1 comments

Yes, most implementations of x86 translate opcodes into equivalent RISC-like micro-ops.

But this was necessary to achieve any kind of real performance with x86. It's a terribly-designed architecture where all of the instructions are scattered all over the map. There's no unifying design, and most operations that should be simple to implement require scads of silicon. Much of the power wasted on x86 chips is in that instruction decode hardware. It's terribly inefficient. (It's also a horrible instruction set to deal with.)