[daeken]

They're closer together, but the distance traveled in total is the same. Imagine the transistors are pieces of paper, and you're drawing a line over them. If the paper is flat, then you're drawing a line of distance n, and the points are n apart. If you fold the ends of the paper together, then the points are 0 units apart (or near enough to make no matter), but that line still has a distance of n.

[Symmetry]

Oh, I think I get what your confusion is now. The signal doesn't have to travel up and over now any more than it did when everything was flat. The signal will travel up a few gate widths to the low resistance metal interconnect layers, travel a few tens or hundreds of gate widths sideways to get to the next transistor, then goes down again to make the connection. Going to 3D doesn't change this except to make the up and down slightly longer and sideways much shorter.

[daeken]

Ah hah, I see what you're saying now. Thanks for clearing that up.

[highfreq]

The previous commenter wasn't talking about this transistor 3d feature, but about stacked transistors. Just like a city full or high-rise buildings can pack a lot more people in per square mile, a stacked transistor IC could pack a lot more transistors per square mm.

[jimmywanger]

The only reason we haven't had stacked transistors now is because of trace density/heat dissipation.

We need pin outs and thermal conductivity - stacking layers of transistors is bad for both.