[kyboren]

They are not currently using ASICs, so ASICs are presumably not a good fit for the application. Maybe the NRE costs are too excessive given the very small volume, flexibility/updateability is essential, TTM is too long, something else, or some combination of the above. Any way you slice it, being cut off from Xilinx is going to cost Huawei.

Building a competitive ASIC will also be significantly more challenging now that Huawei has been cut off from all the major EDA companies.

Finally, I assume that Xilinx is well into development on future product lines based on newer processes. It would be extremely difficult for Huawei to bootstrap their way to commercially competitive FPGAs.