[codys]

As exmadscientist noted, these use the 1wire bus.

The general mechanism (to use 1 io pin as both an input and an output) though is to have the io-pin operate in "open collector" mode. Essentially: it assumes that there is something external "pulling up" the io _line_ (normally a resistor attached to the positive logic level), and all devices attached to the io-line only "pull down" (ie: output the 0 logic level, normally 0v) on their io-pin. The io-pins, thus, have 2 states: low (ie: 0v), and hi-z (high impedance, ie: not driving the output in any direction)

This ensures that no device on the io-line will directly push/pull against the level being driven by the other device (because all devices only drive 0v, and none drive the the logic 1 level, they rely on the pull up).

Then to allow communication to occur reasonably (without both ends pulling the io-line low all the time), buses like 1wire specify how the devices decide which one "wins" (ie: gets to transmit it's data), or which one goes first, or which one directs the other devices to "talk".