[Nokinside]

These are not related at all. Only common element is making silicon.

Apple spends $100+ millions to design high performance microarchitecture to high-end process for their own products.

Google gives tiny amount of help to hobbyists so that they can make chips for legacy nodes. Nice thing to do, nothing to do with Apple SoC.

---

Software people in HN constantly confuse two completely different things

(1) Optimized high performance microarchitecture for the latest prosesses and large volumes. This can cost $100s of millions and the work is repeated every few years for a new process. Every design is closely optimized for the latest fab technology.

(2) Generic ASIC design for process that is few generations old. Software costs few $k or $10ks and you can uses the same design long time.

[_bxg1]

> Nice thing to do

I don't believe Google does anything because it's a "nice thing to do". There's some angle here. The angle could just be spurring general innovation in this area, which they'll benefit from indirectly down the line, but in one way or another this plays to their interests.

[sangnoir]

> I don't believe Google does anything because it's a "nice thing to do".

If only Google had this singular focus... From my external (and lay) observation - some Google departments will indulge senior engineers and let them work on their pet projects, even when the projects are only tangentially related to current focus areas.

Looking at Google org on Github (https://github.com/google); it might be a failure of imagination on my part, but I fail to see an "angle" on a good chunk of them.

[sixothree]

Google has never created a product that does not collect data in a unique manner apart from its other products.

[ladyanita22]

They must be some kind of genius. I don't see how are they going to be able to extract personal information out of here.

[sixothree]

They're not doing this out of the kindness of their heart. Just because we don't know the data being collected here (yet) does not invalidate my statement. Name a google product and you can easily identify the unique data being collected.

[emiliobumachar]

Not necessarily personal. Maybe training a robot to design circuits?

[jagger27]

> few generations old

And by old, I mean /old/. 130 nm was used on the GameCube, PPC G5, and Pentium 4.

[denkmoon]

Think of all the chips from then and before then that are becoming rare. The hobbyist and archivist community do their best with modern replacements, keeping legacy parts alive, and things like FPGAs, but to be able to fab modern drop in replacements for rare chips would be amazing.

Things don't have to be ultra modern to offer value.

[yummypaint]

That's not terribly long ago, really. My understanding is that a sizeable chunk of performance gains since then have come from architectural improvements.

[zrm]

Probably the fastest processor made on 130nm was the AMD Sledgehammer, which had a single core, less than half the performance per clock of modern x64 processors, and topped out at 2.4GHz compared to 4+GHz now, with a die size basically the same as an 8-core Ryzen. So Ryzen 7 on 7nm is at least 32 times faster and uses less power (65W vs. 89W).

You could probably close some of the single thread gap with architectural improvements, but your real problems are going to be power consumption and that you'd have to quadruple the die size if you wanted so much as a quad core.

The interesting uses might be to go the other way. Give yourself like a 10W power budget and make the fastest dual core you can within that envelope, and use it for things that don't need high performance, the sort of thing where you'd use a Raspberry Pi.

[snovv_crash]

You wouldn't get access to ASIC fab just to make a CPU. Fill it with tensor cores, or fft cores, plus a big memory bus. Put custom image processing algorithms on it. Then it will be competitive with modern general silicon despite the node handicap.

[yummypaint]

Your suggestion was more what i was thinking, perhaps something more limited in scope than a general processor. An application that comes to mind is an intentionally simple and auditable device for e2e encryption.

[pflanze]

My understanding is that architectural improvements (i.e. new approaches to detect more parts in code that can be evaluated at the same time, and then do so) need more transistors, ergo a smaller process.

(Jim Keller explains in this interview how CPU designers are making use of the transistor budget: https://youtu.be/Nb2tebYAaOA)