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by rbanffy 2184 days ago
> The contract was being invalidated when he wrote invalid data to a register

This is similar to the "undocumented instructions" on many CPUs of the time. The Z-80 was famous for reacting to invalid opcodes in somewhat useful ways. The 6502 also reacted in weird ways to invalid opcodes, but I don't remember any useful behavior. When the 65C02 came out (//c and //e enhanced) all invalid opcodes mapped to NOPs.

2 comments

The 6800's HCF (Halt and Catch Fire) opcode is another famous example.

https://x86.fr/investigating-the-halt-and-catch-fire-instruc...

x86 had a few undocumented opcodes. AAD and AAM have a second byte that should always be 10, but turns out to be an argument for base10 . There was salc.

A CPU, when it encounters bytes in its instruction stream, has to do something, whatever. If there is no interrupt for invalid instruction, it has to do something else. Common behaviour is shadowing legal insn's , but completely new behaviour is always possible

Actually doing something useful on invalid opcodes is cool, but a bad long-term idea - you'll end up having to support all the accidental behavior that ends up being used forever, or risk breaking backwards compatibility.