NightMKoder's comment was referring to the x32 mode where an application uses the x86_64 ISA and registers but with a 32-bit ABI (ILP32 - int, long, pointers are 32-bit). The kernel is full 64-bit, so there is no overhead like in PAE where the kernel is 32-bit and needs to temporarily map physical addresses above 4GB (using highmem support). On the application side, x32 has some benefits over x86_32 since it has access to a larger register bank and wider registers if needed (e.g long long).
On ARM, there are patches implementing ILP32 with an A64 ISA (AArch64 mode and registers). While there probably is an improvement over the A32/T32 ISA, the benefit is not that great since the 32-bit ARM architecture already had 14 general purpose registers (AArch64 has 30).
The reason the arm64 ILP32 hasn't made it into mainline Linux is not fully justifying the software porting/maintenance cost over the benefit it brings. Full 64-bit software stack is in general a better option unless you run in a very constraint environment but, in that case, an M-class ARM CPU is probably a better option anyway.
On ARM, there are patches implementing ILP32 with an A64 ISA (AArch64 mode and registers). While there probably is an improvement over the A32/T32 ISA, the benefit is not that great since the 32-bit ARM architecture already had 14 general purpose registers (AArch64 has 30).
The reason the arm64 ILP32 hasn't made it into mainline Linux is not fully justifying the software porting/maintenance cost over the benefit it brings. Full 64-bit software stack is in general a better option unless you run in a very constraint environment but, in that case, an M-class ARM CPU is probably a better option anyway.