[chas]

It turns out that CS folks with distributed systems and functional programming experience can be super productive hardware designers because distributed systems have very similar design-level tradeoffs as ASIC design e.g. how many copies of this processing-element do we use?, what's the correct ratio between storage and compute?. They both have pretty rough verification and correctness related to not being able to instantaneously-sharing state, so things like clock-domain-crossing aren't that foreign to the distributed systems folks.

You don't have a notion of clock cycles, making timing, or fan-out load in distributed systems, so if you are going to try this you definitely need some extremely experienced digital logic designers and chip architects around to keep everyone on the rails, but in turn the CS folks are really good at producing useful abstractions that make architecture exploration easy while maintaining correctness.

TL;DR: I've found it easier to teach folks that know Haskell and distributed systems design about hardware constraints than to teach RTL designers about functional abstractions and been really productive with a mix of both groups.