[a1369209993]

Two and (especially) three operand processors spend significantly more space encoding register indexes, though. It's worth it to avoid forth-style pop swap rot, tuck u* spaghetti, but register machines just push the NOP-type inefficiency somewhere else. Eg, obviously most 3ops are the last use of at least one source operand, so there's usually no point encoding separate src1 and dst fields, but also many instructions immediately reuse (often the last and only use) the destination register of the previous instruction as a source.

I'd kinda like to see a machine with a intermediate, one-operand style of instructions. Eg:

  add tos stN # *sp += sp[N]
  add stN pop # sp[N] += *sp++
  ld [stN] # *--sp = mem[sp[N]]