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by tails4e
2255 days ago
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Xilinx are not just writing software, they also must use R&D to develop the FPGA hardware, dev kits, IP, etc, so it's a very different scale to JetBrains' focus. Also in terms of Sofware, the really challenging aspects are under the hood, the place and route algorithms, the static timing engine, the system verilog simulator (which is itself a huge undertaking), the hardware debug cores, the HLS SW that compiles C to accelerated HW, then SDK for embedded processors, oh.. And of course... Finally the GUI/IDE. With all that's going on underneath, Vivado does a decent job of presenting it all in a logical way. I'm blown away that I can see a timing failure on any of a million nets and in a click cros probe it to a line of verilog. As for open source, SystemVerilog is an open standard, yet can you show me an open source simulator that competes with the free one that comes with Vivado? |
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Zero support for source control? SoC have no examples, why can't they systematically provide an hello world example (blink a LED) with their development boards? The IDE itself has close to zero doc and there is no help on the internet, it takes 3 freaking days for an experienced developer to figure out how to create a project.