[Symmetry]

Back in the high CISC era every instruction would be backed by microcode as a series of instructions like "Load the first argument from memory location X; load the address of the second argument from memory location Y; now use that to get the second argument; store the result in memory location Z;"

Then in the RISC era the instructions being fed to processors more closely matched what was going on inside, though pipelining made that a bit more complicated.

These days a processor will still take the incoming instruction stream and sometimes break up instructions into pieces but it will also sometimes fuse two instructions into a single one like a compare followed by a branch.