[hermitdev]

Back in college, when I was studying Very Large Scale Integration (VLSI), I was working on an 8-bit adder. There definitely interesting art to it. It just looked beautiful. We were doing layouts by hand (on the computer, I mean we weren't relying upon an automated layout). I don't know how many iterations I went through trying to minimize latency and area. I remember it being at least a dozen. We had a sort of informal competition (mostly for bragging rights) for the least latency and area. IIRC, I think we were using Cadence to hand-draw the layouts. Lab time was definitely at a premium.