[pmjordan]

I doubt it, PCIe (apparently the main underlying protocol) isn't a common feature of ARM SoC systems.

[nitrogen]

Marvell's cores have one lane of PCI express. Check out the OpenRD: http://www.open-rd.org/

[mortenjorck]

Even if it's not part of ARM's reference designs, could Apple integrate it into a future A-series chip?

[pmjordan]

This goes beyond my knowledge of hardware design, but I suspect there's no fundamental reason preventing it. The signal processing at those sort of clock rates may however consume more power than is practical - I don't know.

[dfox]

PCIe essentially trades greater hardware complexity for lower power requirements (and higher performance). Original PCI is similar in this regard (that also reduced number of required external passive components on motherboards compared to ISA).

So if anything prevents usage of PCIe in embedded devices it's added complexity, not power requirements. By the way electrical interface of most modern true-color TFT panels is identical on the lowest layer to PCIe (and SATA and who knows what else).