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by boulos
2317 days ago
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Not implemented yet. In the stack rank of “stuff needed to update our hypervisor for AMD again” it wasn’t at the top :). Note the again as well: GCE originally had it such that N in N1 meant iNtel, and A1 was for AMD (as Joe said publicly here: https://twitter.com/jbeda/status/1159891645531213824). By the time I joined though, we didn’t see the point of the A1 parts, since the Sandybridge’s smoked them. |
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