|
|
|
|
|
by purisame
2318 days ago
|
|
Here's the usage on my Cyclone 10: Info (21057): Implemented 1509 device resources after synthesis - the final resource count might be different
Info (21058): Implemented 15 input pins
Info (21059): Implemented 33 output pins
Info (21060): Implemented 87 bidirectional pins
Info (21061): Implemented 1240 logic cells
Info (21064): Implemented 128 RAM segments
Info (21065): Implemented 2 PLLs
I haven't been focusing on resource usage yet, but I think there's big savings potential in packet_assembler.sv since it's using around 300 cells just for parity computation. |
|