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by jcelerier 2376 days ago
> it doesn't have to be, as proven by watchOS bitcode, or PNaCL.

Both of those have fixed 32-bit pointer sizes and are little-endian. When you compile for watchOS bitcode or PNaCL you just target a single virtual machine & "system" ABI. LLVM IR or any related techniques won't ever allow you to produce a 32 / 64 bit or ARM / x86 app that is able to leverage the whole feature set of the platform from the same bitcode.
1 comments
pjmlp 2374 days ago
Yet watchOS migrated from 32 bit to 64 bit.

It is possible, LLVM project just needs to actually want to support such use cases in a portable way.

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jcelerier 2374 days ago
> Yet watchOS migrated from 32 bit to 64 bit.

that is what they said in the press release but in practice they migrated from "classical" 32bit ARM to ILP-32 (akin to the x32 ABI on linux) so the size of pointers, etc etc does not change from 32-bit. You get more registers & stuff like that which is nice, but that is not moving to 64 bit, just having nicer 32 bit execution on 64 bit CPUs. If you want proper aarch64 support on WatchOS you have to recompile.

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pjmlp 2374 days ago
Fair enough. Still nothing prevents LLVM bitcode to be fully CPU agnostic, if LLVM guys were willing to keep such variant around.
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