[leetbulb]

This is very interesting and well put together. The diagrams are great. Very easy to read and understand as a software developer that rarely interacts with such low level things. Likely because you're also a software developer :)

I'm curious about introducing a phase shifted clock with a PLL in order to get the rise/fall timings correct. Is that standard in other controller implementations? Is that technique something that's used in other, similar situations? It sounds like a pretty generic and simple way to solve timing issues of that nature. I guess I'm mostly wondering how you came up with that solution and if there are any alternatives? The minds of EE people intrigue me :)

[jlokier]

If you like that, you'll love "wave pipelining", where the information ripples across a circuit with different sub-cycle phases at different positions in the circuit.