[count]

Would it be possible to blend something like this into, say, GCC, so that when you compile your code, easily hardware accelerated sections (for whatever definition of that you like) can be generated into FPGA loadable files and used at runtime?

[Aegean]

Yes I thought about this idea. For example it would be nice to have a .fpga section in the ELF files and one could load images as part of OS file execution.

It is a nice idea and I would try to push this as a technology if I was Xilinx or Altera. But it requires that momentum to become a reality because this creates a new model and ABI for software - one that doesn't exist today.